multiplier effect

• 第七讲 面板数据模型(Fixed Effect, Random Effect)

  第八章 面板数据模型(Panel Data ) 问题和动机 – 遗漏重要变量或有明确的非观测效应 – 动态效应 原理 – 离差消除不可观测效应 – 综合利用截面和时间序列信息 方法 例子

• wind effect estimation and navigational effect

  OTC 23166Wind Effect Estimation and Navigational Effect in Side by Side Offloading Operation for FLNG and LNG Carrier ShipsToshifumi Fujiwara, Kazuhiro Yukawa, Hiroshi Sato, Shunji Kato, National Mar...

• Effect of Y addition on the martensitic transformation and shape memory effect of Ti–Ta

  EffectofYadditiononthemartensitictransformationandshapememoryeffectofTi–Tahigh-temperatureshapememoryalloyX.H.Zheng,J.H.Sui ,X.Zhang,X.H.Tian,W.CaiNationalkeyLaboratoryPrecisionHotProcessingofMetals,S...

• 华莱士树乘法器 Wallace Tree Multiplier

  National Taiwan University8.2.7.3 Wallace Tree Multiplication In effect, a “one’s counter”: A, B, and Cinputs andencodes them on SUMand CARRY outputs.A 1-bit full adder (FA) provides a 3:2compression...

• A super-serial Galois fields multiplier for FPGAs and its application to public-key algorit

• A Low-jitter 2.5-to-10 GHz Clock Multiplier Unit in CMOS

  ALow-jitter2.5-to-10GHzClockMultiplierUnitinCMOSR.C.H.vandeBeek1,2,C.S.Vaucher2,DomineM.W.Leenaerts2,E.A.M.Klumperink1andB.Nauta1UniversityofTwenteMESA+ResearchInstitute,IC-DesigngroupP.O.Box217,7500A...

• Low-complexity Content-adaptive Lagrange Multiplier Decision for SSIM-based RD-optimized VideoCoding

  Low-complexityContent-adaptiveLagrangeMultiplierDecisionforSSIM-basedRD-optimizedVideoCodingPinghuaZhao1,YanweiLiu1,JinxiaLiu2,RuixiaoYao1,SongCi1,3,HuiTang11InstituteofAcoustics,ChineseAcademyofScien...

• Precise finite-sample quantiles of the Jarque-Bera adjusted Lagrange multiplier test

  Precise nite-samplequantilesoftheJarque-BeraadjustedLagrangemultipliertestDiethelmW¨urtzandHelmutG.KatzgraberarXiv:math/0509423v1 [math.ST] 19 Sep 2005SwissFederalInstituteofTechnologyInstitute...

• An all-Digital PLL Clock Multiplier 翻译后的文章

  全数字PLL时钟倍频器托马斯·奥尔森和彼得·尼尔森瑞典隆德，隆德大学，电子科学系，邮政信箱118 SE-22100Thomas.Olsson@es.lth.se Peter.Nilsson@es.lth.se摘要本研究是基于完全集成数字PLL作为时钟乘法电路的设计和制造。该PLL没有片外元件，而是在大多数的数字标准单元库中选取其中一个基本单元。因此，它仅是作为一个进程之间传递的...